Acer Chromebook CB5-311 mainline

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Re: Acer Chromebook CB5-311 mainline

Postby reey » Sat Feb 09, 2019 2:11 am

So I've been able to flash u-boot to the spi flash :D
Easier than I thought, since nvidia seems to have a tool for that :D
What you need is a USB-A to USB-A cable and best would be a SOIC8 flash clip for recovery + something like a raspberry pi..
Make a backup of your current SPI flash with the flashrom tool
after that: some steps to follow:
$this->bbcode_second_pass_code('', 'mkdir work
cd work
curl http://commondatastorage.googleapis.com/git-repo-downloads/repo > repo
chmod a+x repo
mkdir tegra-uboot-flasher
cd tegra-uboot-flasher
../repo init -u git://github.com/NVIDIA/tegra-uboot-flasher-manifests.git
../repo sync
cd u-boot
git checkout v2018.11
cd ../scripts
./build-tools
cp ../u-boot/configs/nyan-big_defconfig ../u-boot/configs/norrin_defconfig
nano ../u-boot/configs/norrin_defconfig
')
change the current CONFIG_SYS_TEXT_BASE entry to:
$this->bbcode_second_pass_code('', 'CONFIG_SYS_TEXT_BASE=0x80110000')
and also add, since without LPAE you are not getting any output on screen:
$this->bbcode_second_pass_code('', 'CONFIG_ARMV7_LPAE=y')
You might also want to add this for all 4GB to work properly:
$this->bbcode_second_pass_code('', 'CONFIG_PHYS_64BIT=y')

Compile and test it with:
$this->bbcode_second_pass_code('', 'CROSS_COMPILE=arm-none-eabi- ./build --boards norrin build
./tegra-uboot-flasher exec norrin')

after testing flash it if you want by running:
$this->bbcode_second_pass_code('', './tegra-uboot-flasher exec norrin')

Only problem at the moment is, that u-boot isn't displaying anything on the display..
EDIT: with "CONFIG_ARMV7_LPAE=y" we get output on the display :)
But it is booting up linux, if it was set up correctly from a u-boot, that was chainloaded to coreboot..

Does someone know if and where the serial console of the device is available?
I know, that if I had a servo board i could access it through that, but the tx and rx lines should also be available somewhere on the board..

Edit: added LPAE line..
Last edited by reey on Sun Feb 24, 2019 10:17 am, edited 7 times in total.
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Re: Acer Chromebook CB5-311 mainline

Postby fedup » Sat Feb 09, 2019 9:33 am

@reey
Great news! Shame about the display, is the not keyboard working in u-boot? Were you able to get LPAE with 4GB? Are you going to wipe the other partitions on the internal eMMC and say goodbye to chromeos? My problem is that this is my primary machine at the moment but I have got a pc in a cupboard which I can use. I think you can back up the current with flashrom on chromos, oh I see you already said that. Did you disable software write protection or does the nvidia tool do that for you? What about the hardware write protection is it a switch or screw?
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Re: Acer Chromebook CB5-311 mainline

Postby fedup » Sat Feb 09, 2019 9:46 am

@reey
I'm just wondering if the tools you have used has just flashed the RW_LEGACY part of the flash which is writable, if enabled. This would leave the coreboot and use u-boot as a payload. If you have not removed the screw then this would be the case. This may possibly explain the display problem. I don't fully understand what the nvidea tools are doing.
Real progress, so great work!!
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Re: Acer Chromebook CB5-311 mainline

Postby reey » Sat Feb 09, 2019 10:26 am

So I think there is no write protect screw on our device..
At least I was able to write to it via the usb cable without removing a screw..

There is no coreboot anymore on the spi flash, it is just u-boot.
I erased coreboot beforehand to get into the usb recovery mode and it isn't compiled by that tool from nvidia :)

U-boot is not showing anything on screen, but I'm able to use the keyboard to select from which partition to boot via "setenv distro_bootpart <partitionnumber>" :)

I can provide you a dump of the spi chip, so you are able to flash it onto your device without compiling it yourself, but I would only recommend that, if you have the tools for the recovery..
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Re: Acer Chromebook CB5-311 mainline

Postby fedup » Sat Feb 09, 2019 11:19 am

@reey
I think there is no write protection screw on the acer 13's then! I've just take a look the documentation of tegrarcm so I can now understand what you've done. As you say not a good idea for me to flash until I have setup a way to recover if something goes wrong.
Did you get 4GB when you boot directly from u-boot?
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Re: Acer Chromebook CB5-311 mainline

Postby reey » Sat Feb 09, 2019 3:50 pm

So booting direcly from u-boot still ends with 2GB of memory..

I've solved the problem with no display output in u-boot :)
Just needed to activate LPAE in u-boot:
CONFIG_ARMV7_LPAE=y

I was hoping that this also solves the limited amount of ram, but it didn't..

So this is quiet usable now :)
Only thing I want to change is, that the u-boot environment gets saved onto the emmc as you can see here:
https://github.com/u-boot/u-boot/blob/m ... nyan-big.h
I want to change that to the SPI, too :)

I also had some problems with newer versions of u-boot, that I also need to try again, but 2018.11 is new enough for now :)

I've uploaded the spi rom here:
https://github.com/reey/LinuxOnAcerCB5- ... screen.rom

Since I'm not sure if it matters: please just use this if you also have a 4GB model..
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Re: Acer Chromebook CB5-311 mainline

Postby NoDiskNoFun » Mon Feb 11, 2019 6:20 am

@reey: So with the instructions from last post on page 12 i could boot u-boot without flashing SPI? In the readme/patchset there are mentioned two keys which have to be pressed, but i dont know which they are. So with that information and if this process leaves my SPI untouched i could test your u-boot image on my 2GB model.

@fedup: If the write protection screw is labeled with J10 or JP10 or something like that then there is one. I can remember that i removed one about two years ago.
EDIT:
https://imgur.com/a/DiPqI On picture one it's next to dot number two, Labeled JP10

But after some googeling i'm not enterly sure if that is the correct screw
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Re: Acer Chromebook CB5-311 mainline

Postby reey » Mon Feb 11, 2019 8:48 am

@NoDiskNoFun
With the instructions from the first post on page 13 you should be able to also boot u-boot without flashing it to the internal SPI.. the only thing you need to change is:
instead of running: ./tegra-uboot-flasher flash norrin
you need to run: ./tegra-uboot-flasher exec norrin

My u-boot image is meant to be flashed to the SPI chip with the flashrom tool, since this is just the backup I made via flashrom of it...
I could provide the original file, that was used to flash it later on.

I also tried to find these buttons, but the buttons mentioned are from the servo board, not from our nyan-big mainboard..
But our mainboard also has 3 unpopulated buttons and a unpopulated switch..
I had no buttons of this size laying around, so I wasn't able to try them..

But there is also a populated button on the mainboard which I wasn't able to find out, what it is used for..

Edit:
we should be able to enter the tegrarcm mode by executing "enterrcm" from the chainloaded u-boot, I didn't tried that yet, but it was suggested on the tegra mailing list :)
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Re: Acer Chromebook CB5-311 mainline

Postby NoDiskNoFun » Mon Feb 11, 2019 12:02 pm

@reey: after some research i found out that you need a so called "servo board" which holds these buttons. also it seems like you need to solder a 50-pin connector to jp4 (next to sdcard reader).
It seems to be easier to just backup spi, then flash your u-boot and if that bricks my device revert changes on spi with backup-file. But in this case i need to order a SOIC8 flash clip :?
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Re: Acer Chromebook CB5-311 mainline

Postby reey » Mon Feb 11, 2019 12:07 pm

The problem with this servo board is, that these are just available to google developers and you cannot buy them..
have you seen my edit?:
$this->bbcode_second_pass_quote('reey', '
')
we should be able to enter the tegrarcm mode by executing "enterrcm" from the chainloaded u-boot, I didn't tried that yet, but it was suggested on the tegra mailing list


I can upload the binary I created using the nvidia tools, so you should be able to just test it and afterwards flash it, so you are not risking anything and don't need the spi clip.. :)
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