4G RAM on C100P

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Re: 4G RAM on C100P

Postby summers » Tue Jun 06, 2017 8:36 pm

Usual chrome bios is coreboot, and the bootloader is depthcharge.

The documentation avaiable on depthcharge, seems minimal.

Still your machine uses a device tree, so it must pe possible. Don't know if it can be permenantly fixed to the kernel (IIRC I read somewhere about it tacked on the end of the kernel file), and kernel can be configured to find it there. Now I don't know if this is what coreboot does.

So really need someone where that undesrands chrome/coreboot/depthcharge - or you'll need to fiddle. Sorry I can't help much, I have no hardware that does this ...
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Re: 4G RAM on C100P

Postby summers » Wed Jun 07, 2017 9:43 am

Check first few pages of:

https://events.linuxfoundation.org/site ... ummies.pdf

It explains how the device tree is passed to the kernel. Interesting is bolting it to the end of the kernel, which you can check in /proc/config.gz if CONFIG_ARM_APPENDED_DTB is set.

If so then device tree is added onto the kernel, now you'll need to work out how arch does this (probably during kernel install), but anyway gives a route to follow. Actually doesn't the booting kernel also give the command line it was passed? If so you can check if it looks like a device tree is passed there ...
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Re: 4G RAM on C100P

Postby yaroze » Wed Jun 07, 2017 10:17 am

Seems to be a difference in memory pages before the kernel command gets called between the 2 os.
It does not pass any info on whic dt it uses, that is worked out with the compatibility id in the device-tree structure.
You can see the 'Google minnie' id which it uses to find it compatibilty.
As I understand the loader on chrome just reads which ever GPT partition you choose and runs but the device tree should be used if there is a matching 'compatibility id' in /boot/dtbs/.

So I changed the 'Google Mnnie' dtb memory value in the /boot/dtbs dir but it does not pick it up.

But after looking on chrome at the device tree is has a memory setting of 2gig but has available memory of 4 gig!

I think there is something else going on other than the device-tree setting.


Boot on ARCHARM:

Booting Linux on physical CPU 0x500
Jun 07 10:29:37 alarm kernel: Linux version 4.11.3-1-ARCH (builduser@leming) (gcc version 6.3.1 20170306 (GCC) ) #1 SMP Sat May 27 02:42:54 UTC 2017
Jun 07 10:29:37 alarm kernel: CPU: ARMv7 Processor [410fc0d1] revision 1 (ARMv7), cr=10c5387d
Jun 07 10:29:37 alarm kernel: CPU: div instructions available: patching division code
Jun 07 10:29:37 alarm kernel: CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
Jun 07 10:29:37 alarm kernel: OF: fdt: Machine model: Google Minnie
Jun 07 10:29:37 alarm kernel: Memory policy: Data cache writealloc
Jun 07 10:29:37 alarm kernel: cma: Reserved 48 MiB at 0x7d000000
Jun 07 10:29:37 alarm kernel: On node 0 totalpages: 524288
Jun 07 10:29:37 alarm kernel: free_area_init_node: node 0, pgdat c12f79c0, node_mem_map eedf9000
Jun 07 10:29:37 alarm kernel: Normal zone: 1728 pages used for memmap
Jun 07 10:29:37 alarm kernel: Normal zone: 0 pages reserved
Jun 07 10:29:37 alarm kernel: Normal zone: 196608 pages, LIFO batch:31
Jun 07 10:29:37 alarm kernel: HighMem zone: 327680 pages, LIFO batch:31
Jun 07 10:29:37 alarm kernel: percpu: Embedded 16 pages/cpu @eed8b000 s35404 r8192 d21940 u65536
Jun 07 10:29:37 alarm kernel: pcpu-alloc: s35404 r8192 d21940 u65536 alloc=16*4096
Jun 07 10:29:37 alarm kernel: pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3
Jun 07 10:29:37 alarm kernel: Built 1 zonelists in Zone order, mobility grouping on. Total pages: 522560
Jun 07 10:29:37 alarm kernel: Kernel command line: cros_secure console=tty0 init=/sbin/init root=PARTUUID=5c500120-17cb-6145-bd8c-dc975a4f5fd8/PARTNROFF=1 rootwait rw noinitrd
Jun 07 10:29:37 alarm kernel: PID hash table entries: 4096 (order: 2, 16384 bytes)
Jun 07 10:29:37 alarm kernel: Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Jun 07 10:29:37 alarm kernel: Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Jun 07 10:29:37 alarm kernel: Memory: 2007880K/2097152K available (11264K kernel code, 1000K rwdata, 4484K rodata, 1024K init, 903K bss, 40120K reserved, 49152K cma-reserved, 1260544K
Jun 07 10:29:37 alarm kernel: Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
vmalloc : 0xf0800000 - 0xff800000 ( 240 MB)
lowmem : 0xc0000000 - 0xf0000000 ( 768 MB)
pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
.text : 0xc0008000 - 0xc0c00000 (12256 kB)
.init : 0xc1100000 - 0xc1200000 (1024 kB)
.data : 0xc1200000 - 0xc12fa2c8 (1001 kB)
.bss : 0xc12fc000 - 0xc13ddd10 ( 904 kB)
Jun 07 10:29:37 alarm kernel: SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1


Boot on ChromOS:


2017-06-06T22:46:32.247832+01:00 INFO kernel: [ 0.000000] Machine model: Google Minnie
2017-06-06T22:46:32.247834+01:00 INFO kernel: [ 0.000000] Memory policy: Data cache writealloc
2017-06-06T22:46:32.247837+01:00 DEBUG kernel: [ 0.000000] On node 0 totalpages: 1044459
2017-06-06T22:46:32.247844+01:00 DEBUG kernel: [ 0.000000] free_area_init_node: node 0, pgdat c104e940, node_mem_map ed81b000
2017-06-06T22:46:32.247869+01:00 DEBUG kernel: [ 0.000000] Normal zone: 1520 pages used for memmap
2017-06-06T22:46:32.247873+01:00 DEBUG kernel: [ 0.000000] Normal zone: 0 pages reserved
2017-06-06T22:46:32.247876+01:00 DEBUG kernel: [ 0.000000] Normal zone: 194560 pages, LIFO batch:31
2017-06-06T22:46:32.247879+01:00 DEBUG kernel: [ 0.000000] HighMem zone: 6640 pages used for memmap
2017-06-06T22:46:32.247882+01:00 DEBUG kernel: [ 0.000000] HighMem zone: 849899 pages, LIFO batch:31
2017-06-06T22:46:32.247885+01:00 INFO kernel: [ 0.000000] PERCPU: Embedded 9 pages/cpu @ed7c3000 s14464 r8192 d14208 u36864
2017-06-06T22:46:32.247887+01:00 DEBUG kernel: [ 0.000000] pcpu-alloc: s14464 r8192 d14208 u36864 alloc=9*4096
2017-06-06T22:46:32.247894+01:00 DEBUG kernel: [ 0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3
2017-06-06T22:46:32.247896+01:00 NOTICE kernel: [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 1042939
2017-06-06T22:46:32.247899+01:00 NOTICE kernel: [ 0.000000] Kernel command line: cros_secure console= loglevel=7 init=/sbin/init cros_secure oops=panic panic=-1 root=/dev/dm-0 rootwait ro dm_verity.error_behavior=3 dm_verity.max_bios=-1 dm_verity.dev_wait=1 dm="1 vroot none ro 1,0 3334144 verity payload=PARTUUID=6f5cb9c9-4789-214a-84af-4002f3172995/PARTNROFF=1 hashtree=PARTUUID=6f5cb9c9-4789-214a-84af-4002f3172995/PARTNROFF=1 hashstart=3334144 alg=sha1 root_hexdigest=13c86f05e01f42cd3329f8f4c9078c47a394acd8 salt=ea496081b0bf8b361be9496738b2d40be53159adbaeaf53e35f3dd46c16b1ce5" noinitrd vt.global_cursor_default=0 kern_guid=6f5cb9c9-4789-214a-84af-4002f3172995
2017-06-06T22:46:32.247902+01:00 INFO kernel: [ 0.000000] device-mapper: init: will configure 1 devices
2017-06-06T22:46:32.247905+01:00 INFO kernel: [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes)
2017-06-06T22:46:32.247907+01:00 INFO kernel: [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
2017-06-06T22:46:32.247909+01:00 INFO kernel: [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
2017-06-06T22:46:32.247914+01:00 NOTICE kernel: [ 0.000000] Memory: 4111220K/4177836K available (8748K kernel code, 344K rwdata, 1988K rodata, 422K init, 727K bss, 66616K reserved, 3382272K highmem)
2017-06-06T22:46:32.247917+01:00 NOTICE kernel: [ 0.000000] Virtual kernel memory layout:
2017-06-06T22:46:32.247919+01:00 NOTICE kernel: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
yaroze
 
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Re: 4G RAM on C100P

Postby summers » Wed Jun 07, 2017 11:26 am

So arch:
$this->bbcode_second_pass_code('', 'Jun 07 10:29:37 alarm kernel: Kernel command line: cros_secure console=tty0 init=/sbin/init root=PARTUUID=5c500120-17cb-6145-bd8c-dc975a4f5fd8/PARTNROFF=1 rootwait rw noinitrd')
and Chrome
$this->bbcode_second_pass_code('', '2017-06-06T22:46:32.247899+01:00 NOTICE kernel: [ 0.000000] Kernel command line: cros_secure console= loglevel=7 init=/sbin/init cros_secure oops=panic panic=-1 root=/dev/dm-0 rootwait ro dm_verity.error_behavior=3 dm_verity.max_bios=-1 dm_verity.dev_wait=1 dm="1 vroot none ro 1,0 3334144 verity payload=PARTUUID=6f5cb9c9-4789-214a-84af-4002f3172995/PARTNROFF=1 hashtree=PARTUUID=6f5cb9c9-4789-214a-84af-4002f3172995/PARTNROFF=1 hashstart=3334144 alg=sha1 root_hexdigest=13c86f05e01f42cd3329f8f4c9078c47a394acd8 salt=ea496081b0bf8b361be9496738b2d40be53159adbaeaf53e35f3dd46c16b1ce5" noinitrd vt.global_cursor_default=0 kern_guid=6f5cb9c9-4789-214a-84af-4002f3172995')
and neither is set up in a way to pass a device tree. So can conclude that depthcharge isn't setting the device tree.

So now need to establish how kernel is getting device tree, suggest checking CONFIG_ARM_APPENDED_DT, as that seems the most likely option. Once you have found how the device tree is obtained, you can go about changing it ...
$this->bbcode_second_pass_code('', 'gunzip -c /proc/config.gz | grep CONFIG_ARM_APPENDED_DT')
summers
 
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Re: 4G RAM on C100P

Postby summers » Wed Jun 07, 2017 11:43 am

And if you check this:

https://archlinuxarm.org/packages/armv7 ... s/PKGBUILD

you can see how it appends the dtb on the end of the kernel for most chromebook options. So that seems how it is done. Whats strange is they are then converted into uImage - which is a Das UBoot set up, whereas we expect you to be depthcharge.
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Re: 4G RAM on C100P

Postby yaroze » Wed Jun 07, 2017 12:28 pm

gunzip -c /proc/config.gz | grep CONFIG_ARM_APPENDED_DT
CONFIG_ARM_APPENDED_DTB=y

I was going to try and load the overlay but I cant use configfs as option is not set in kernel.

# CONFIG_OF_CONFIGFS is not set

So I have to write a driver to load the overlay or I guess compile a kernel or figure out as you suggest to get it to actually use the DT in boot.

The chromeOS bios does use depthcharge on its log


Starting depthcharge on veyron_minnie...
The GBB signature is at 0x43004020 and is: 24 47 42 42
Wipe memory regions:
[0x00000000000000, 0x00000002000000)
[0x00000002000200, 0x00000031f00000)
[0x00000032000000, 0x00000043000000)
[0x0000004414b6b0, 0x000000fefeb000)
Initializing DWC2 USB controller at 0xff540000.
Initializing DWC2 USB controller at 0xff580000.
Calling VbSelectAndLoadKernel().
cros_ec_init: CrosEC protocol v3 supported (544, 544)
Google ChromeOS EC driver ready, id 'minnie_v1.1.2712-242f6bd'
Clearing the recovery request.
VbEcSoftwareSync(devidx=0)
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Re: 4G RAM on C100P

Postby summers » Wed Jun 07, 2017 12:48 pm

So that says your kernel does expect the device tree at the end of the kernel. So if you check the PKGBUILD for your machine, you'll see how it merges the kernel with the dtb.

So you'll need to do the same with your new dtb ...
summers
 
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Re: 4G RAM on C100P

Postby yaroze » Wed Jun 07, 2017 1:38 pm

Ok, I not following where in the PKGFILE is adding the device-tree blob.

I can see where it is piped in to myimage on the other packages but on the chromebook package.

Sorry if im missing something obvious this is all new to me:-)

would make sense thou as in the install it says to :-

Flash the kernel to the kernel partition:
dd if=root/boot/vmlinux.kpart of=/dev/sda1
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Re: 4G RAM on C100P

Postby WarheadsSE » Wed Jun 07, 2017 2:07 pm

$this->bbcode_second_pass_code('', '
mkimage -D "-I dts -O dtb -p 2048" -f kernel.its vmlinux.uimg
')
Make a kernel uImage with one-or-more FDT blobs (DTBs). See content of kernel.its
$this->bbcode_second_pass_code('', '
vbutil_kernel \
--pack vmlinux.kpart \
--version 1 \
--vmlinuz vmlinux.uimg \
--arch arm \
--keyblock kernel.keyblock \
--signprivate kernel_data_key.vbprivk \
--config cmdline \
--bootloader bootloader.bin

cp vmlinux.kpart "${pkgdir}/boot"
')
Use vbutil_kernel to package this all up into a proper ChromeOS kpart file, and place it into /boot

Then see linux-veyron.install for the behaviors for installation/flashing
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Re: 4G RAM on C100P

Postby yaroze » Thu Jun 08, 2017 6:08 am

Yay it worked!

Thanks for all your help and sticking with me.

I read that the dti files can override inherited nodes from include files, is it possible to do this as a arm patch for rk3288-veyron-minnie.dts and set the value of memory to

device_type = "memory";

reg = <0x0 0xfdf00000>;


Is that possible as only the flipbook uses that dtb file?

Obviously that would fix this issue in the long term.
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