Kernel 6.2 does not boot on Odroid N2+

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Re: Kernel 6.2 does not boot on Odroid N2+

Postby graysky » Tue Mar 07, 2023 11:25 am

Assuming these are headless systems... really need to hook up a monitor to see what is happening if failure does not write to journalctl. There may be an option to log to memory with ramoops although I never got it working right and lost interest.
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Re: Kernel 6.2 does not boot on Odroid N2+

Postby luna » Wed May 17, 2023 12:47 pm

I'm seeing this as well. I have a serial console attached to my N2+ and this is what I see when it boots the 6.x kernel:

$this->bbcode_second_pass_code('', 'SPINOR:0;0.
bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0000 - pwm id 0x01
bl2_stage_init 0xc1
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:0000c067
L3:14000020
B2:00402000
B1:e0f83180

TE: 58159

BL2 Built : 06:17:13, Jun 28 2019. g12b gf0505d7-dirty - qi.duan@droid13

Board ID = 5
Set A53 clk to 24M
Set A73 clk to 24M
Set clk81 to 24M
A53 clk: 1200 MHz
A73 clk: 1200 MHz
CLK81: 166.6M
smccc: 00012b0b
DDR driver_vesion: LPDDR4_PHY_V_0_1_14 build time: Jun 28 2019 06:17:09
board id: 5
Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
fw parse done
Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
Load ddrfw from SPI, src: 0x0002c000, des: 0xfffd0000, size: 0x00004000, part: 0
PIEI prepare done
fastboot data load
fastboot data verify
verify result: 255
Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
DDR4 probe
ddr clk to 1320MHz
Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of Write leveling coarse delay
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
Load ddrfw from SPI, src: 0x00020000, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!

R0_RxClkDly_Margin==82 ps 7
R0_TxDqDly_Margi==106 ps 9


R1_RxClkDly_Margin==0 ps 0
R1_TxDqDly_Margi==0 ps 0

dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001
2D training succeed
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 2048MB
DMC_DDR_CTRL: 00600024DDR size: 3928MB
cs0 DataBus test pass
cs1 DataBus test pass
cs0 AddrBus test pass
cs1 AddrBus test pass
pre test bdlr_100_average==407 bdlr_100_min==407 bdlr_100_max==407 bdlr_100_cur==407
aft test bdlr_100_average==407 bdlr_100_min==407 bdlr_100_max==407 bdlr_100_cur==407
non-sec scramble use zero key
ddr scramble enabled

100bdlr_step_size ps== 416
result report
boot times 0Enable ddr reg access
Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x00094e00, part: 0
0.0;M3 CHK:0;cm4_sp_mode 0
E30HDR
MVN_1=0x00000000
MVN_2=0x00000000
[Image: g12b_v1.1.3375-8f9c8a7 2019-01-24 10:44:46 guotai.shen@droid11-sz]
OPS=0x40
ring efuse init
chipver efuse init
29 0c 40 00 01 1c 23 00 00 0d 33 34 33 42 42 50
[0.019859 Inits done]
secure task start!
high task start!
low task start!
run into bl31
NOTICE: BL31: v1.3(release):ab8811b
NOTICE: BL31: Built : 15:03:31, Feb 12 2019
NOTICE: BL31: G12A normal boot!
NOTICE: BL31: BL33 decompress pass
ERROR: Error initializing runtime service opteed_fast


U-Boot 2015.01 (Mar 17 2022 - 12:57:50)

DRAM: 3.5 GiB
Relocation Offset is: d6ef4000
spi_post_bind(spifc): req_seq = 0
register usb cfg[0][1] = 00000000d7f86348
MMC: aml_priv->desc_buf = 0x00000000d3ee47c0
aml_priv->desc_buf = 0x00000000d3ee6b00
SDIO Port C: 0, SDIO Port B: 1
spifc_probe: reg=00000000ffd14000, mem_map=00000000f6000000
SF: Detected XT25Q64 with page size 256 Bytes, erase size 4 KiB, total 8 MiB
In: serial
Out: serial
Err: serial
vpu: error: vpu: check dts: FDT_ERR_BADMAGIC, load default parameters
vpu: driver version: v20190313
vpu: detect chip type: 9
vpu: clk_level default: 7(666667000Hz), max: 7(666667000Hz)
vpu: clk_level = 7
vpu: vpu_power_on
vpu: set_vpu_clk
vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100)
vpu: set_vpu_clk finish
vpu: vpu_module_init_config
vpp: vpp_init
vpp: g12a/b osd1 matrix rgb2yuv ..............
vpp: g12a/b osd2 matrix rgb2yuv..............
vpp: g12a/b osd3 matrix rgb2yuv..............
cvbs: cpuid:0x29
cvbs_config_hdmipll_g12a
cvbs_set_vid2_clk
aml_i2c_init_port init regs for 2
[aml_i2c_xfer] error ret = -5 i2c master a current slave addr is 0x32
i2c 0xff 0x60 write failed
[aml_i2c_xfer] error ret = -5 i2c master a current slave addr is 0x32
i2c 0x00 read failed
[aml_i2c_xfer] error ret = -5 i2c master a current slave addr is 0x32
i2c 0x01 read failed
[aml_i2c_xfer] error ret = -5 i2c master a current slave addr is 0x32
i2c 0x02 read failed
Read Chip : 0x0, 0x0, 0x0
failed to read LT8619C chip id
lt8619c hdmi_to_lcd device not found.!
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
emmc/sd response timeout, cmd8, status=0x1bf2800
emmc/sd response timeout, cmd55, status=0x1bf2800
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x1, tx-dly 0, clock 40000000
aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x162000
[mmc_startup] mmc refix success
[mmc_init] mmc init success
switch to partitions #0, OK
mmc0(part 0) is current device
Net: dwmac.ff3f0000
Hit Enter or space or Ctrl+C key to stop autoboot -- : 0
SF: Detected XT25Q64 with page size 256 Bytes, erase size 4 KiB, total 8 MiB
SF: 7274496 bytes @ 0x110000 Read: OK
### CRAMFS load complete: 2156 bytes loaded to 0x10000000
## Executing script at 10000000
[OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
[OSD]set initrd_high: 0x3d800000
[OSD]fb_addr for logo: 0x3d800000
[OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
[OSD]fb_addr for logo: 0x3d800000
[OSD]VPP_OFIFO_SIZE:0xfff01fff
[CANVAS]canvas init
[CANVAS]addr=0x3d800000 width=5760, height=2160
cvbs: outputmode[1080p60hz] is invalid
vpp: vpp_matrix_update: 2
set hdmitx VIC = 16
config HPLL = 5940000 frac_rate = 1
HPLL: 0x3b3a04f7
HPLL: 0x1b3a04f7
HPLLv1: 0xdb3a04f7
config HPLL done
j = 6 vid_clk_div = 1
hdmitx phy setting done
hdmitx: set enc for VIC: 16
enc_vpu_bridge_reset[1319]
rx version is 1.4 or below div=10
HDMI cable is NOT connected
card out
** Bad device mmc 1 **
### CRAMFS load complete: 41831 bytes loaded to 0x3000000
[OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
[OSD]fb_addr for logo: 0x3d800000
[OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
[OSD]fb_addr for logo: 0x3d800000
[OSD]VPP_OFIFO_SIZE:0xfff01000
[CANVAS]addr=0x3d800000 width=3840, height=1440
cvbs: outputmode[720p60hz] is invalid
vpp: vpp_matrix_update: 2
set hdmitx VIC = 4
config HPLL = 5940000 frac_rate = 1
HPLL: 0x3b3a04f7
HPLL: 0x1b3a04f7
HPLLv1: 0xdb3a04f7
config HPLL done
j = 3 vid_clk_div = 1
hdmitx phy setting done
hdmitx: set enc for VIC: 4
enc_vpu_bridge_reset[1319]
rx version is 1.4 or below div=10
set hdmitx VIC = 4
config HPLL = 5940000 frac_rate = 1
HPLL: 0x3b3a04f7
HPLL: 0x1b3a04f7
HPLLv1: 0xdb3a04f7
config HPLL done
j = 3 vid_clk_div = 1
hdmitx phy setting done
hdmitx: set enc for VIC: 4
enc_vpu_bridge_reset[1319]
rx version is 1.4 or below div=10
[OSD]osd_hw.free_dst_data: 0,1279,0,719
card out
** Bad device mmc 1 **
card out
** Bad device mmc 1 **
### CRAMFS load complete: 3937382 bytes loaded to 0x2000000
### CRAMFS load complete: 3011728 bytes loaded to 0x3000000
### CRAMFS load complete: 71708 bytes loaded to 0x1000000
ee_gate_off ...
## Booting kernel from Legacy Image at 02000000 ...
Image Name:
Image Type: AArch64 Linux Kernel Image (gzip compressed)
Data Size: 3937318 Bytes = 3.8 MiB
Load Address: 01080000
Entry Point: 01080000
Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 03000000 ...
Image Name:
Image Type: AArch64 Linux RAMDisk Image (uncompressed)
Data Size: 3011664 Bytes = 2.9 MiB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
active_slot is <NULL>
Unknown command 'store' - try 'help'
No dtbo patitions found
load dtb from 0x1000000 ......
## Flattened Device Tree blob at 01000000
Booting using the fdt blob at 0x1000000
No valid dtbo image found
Uncompressing Kernel Image ... OK
kernel loaded at 0x01080000, end = 0x019ec808
reserving fdt memory region: addr=1000000 size=12000
Loading Ramdisk to 3d520000, end 3d7ff450 ... OK
Loading Device Tree to 000000001ffeb000, end 000000001ffff81b ... OK

Starting kernel ...

uboot time: 6444956 us
7f800000 - 80000000, 8192 KB, linux,meson-fb
e5800000 - ed800000, 131072 KB, linux,ion-dev
e3000000 - e5800000, 40960 KB, linux,di_cma
e3000000 - e3000000, 0 KB, linux,ppmgr
cfc00000 - e3000000, 315392 KB, linux,codec_mm_cma
cfc00000 - cfc00000, 0 KB, linux,codec_mm_reserved
05000000 - 05400000, 4096 KB, linux,secmon
codec_mm_module_init
clkmsr ffd18004.meson_clk_msr: failed to get msr ring reg0
meson-pwm ff802000.pwm: pwm pinmux : can't get pinctrl
meson-pwm ffd1b000.pwm: pwm pinmux : can't get pinctrl
meson_cpufreq_init:don't find the node <dynamic_gp1_clk>
meson_cpufreq_init:don't find the node <dynamic_gp1_clk>
ff803000.serial: clock gate not found
rtc-pcf8563 1-0051: low voltage detected, date/time is not reliable.
meson-remote ff808040.rc: don't find the node <led_blink>
meson-remote ff808040.rc: don't find the node <led_blink_frq>
meson-fb meson-fb: create ion_client ffffffc09e668b40, handle=ffffffc09e5dba00
meson-fb meson-fb: ion memory(0): created fb at 0x00000000e5800000, size 75 MiB
di_get_vpu_clkb: get clk vpu error.
meson-mmc: >>>>>>>>hostbase ffffff800852b000, dmode
meson-mmc: >>>>>>>>hostbase ffffff8008534000, dmode
rtc-pcf8563 1-0051: low voltage detected, date/time is not reliable.
rtc-pcf8563 1-0051: hctosys: unable to read the hardware clock
dwc_otg: usb0: type: 2 speed: 0, config: 0, dma: 0, id: 0, phy: ffe09000, ctrl: 0
dwc_otg: Core Release: 3.30a
dwc_otg: Setting default values for core params
dwc_otg: curmode: 0, host_only: 0
dwc_otg: Using Buffer DMA mode
dwc_otg: OTG VER PARAM: 1, OTG VER FLAG: 1
dwc_otg: Working on port type = SLAVE
dwc_otg: Dedicated Tx FIFOs mode
pm-meson aml_pm: Can't get switch_clk81

/ # wake-on-lan = 00000000
wake-on-lan = 00000000
')

Nothing happens after this, even after 30 minutes. Before updating the kernel, I was able to do everything I wanted via the console. The only change was, indeed, updating the kernel. I did a `pacman -Syu` and rebooted previously, then updated the kernel, and now it won't boot.
luna
 
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Joined: Wed May 17, 2023 12:39 pm

Re: Kernel 6.2 does not boot on Odroid N2+

Postby woody » Wed May 17, 2023 1:39 pm

@luna:
That's the same experience I'm having. I hope somebody can jump in who knows what's needed to make this work.
woody
 
Posts: 88
Joined: Tue Dec 11, 2012 2:40 pm

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