Dug a bit this morning - looks like the kernel module is
https://github.com/torvalds/linux/blob/master/drivers/net/ethernet/realtek/r8169.c there were along of changes to r8169.c between 4.19 and 4.20. Full diff is
$this->bbcode_second_pass_code('', 'diff linux-4.19/drivers/net/ethernet/realtek/r8169.c linux-4.20/drivers/net/ethernet/realtek/r8169.c
80,81d79
< #define RTL8169_TX_TIMEOUT (6*HZ)
<
636d633
< RTL_FLAG_TASK_SLOW_PENDING,
1357c1354,1355
< rtl_ack_events(tp, RTL_EVENT_NAPI | tp->event_slow);
---
> rtl_ack_events(tp, 0xffff);
> /* PCI commit */
4051,4058c4049
< netif_dbg(tp, drv, dev,
< "Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
< RTL_W8(tp, 0x82, 0x01);
< }
<
< pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40);
<
< if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
---
> pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40);
4060,4061d4050
<
< if (tp->mac_version == RTL_GIGA_MAC_VER_02) {
4065,4067d4053
< netif_dbg(tp, drv, dev,
< "Set PHY Reg 0x0bh = 0x00h\n");
< rtl_writephy(tp, 0x0b, 0x0000); //w 0x0b 15 0 0
4178c4164,4166
< if (!netif_running(tp->dev) || !__rtl8169_get_wol(tp))
---
> struct phy_device *phydev;
>
> if (!__rtl8169_get_wol(tp))
4181c4169,4172
< phy_speed_down(tp->dev->phydev, false);
---
> /* phydev may not be attached to netdevice */
> phydev = mdiobus_get_phy(tp->mii_bus, 0);
>
> phy_speed_down(phydev, false);
4569,4581c4560
< static const struct rtl_cfg2_info {
< u32 mac_version;
< u32 clk;
< u32 val;
< } cfg2_info [] = {
< { RTL_GIGA_MAC_VER_05, PCI_Clock_33MHz, 0x000fff00 }, // 8110SCd
< { RTL_GIGA_MAC_VER_05, PCI_Clock_66MHz, 0x000fffff },
< { RTL_GIGA_MAC_VER_06, PCI_Clock_33MHz, 0x00ffff00 }, // 8110SCe
< { RTL_GIGA_MAC_VER_06, PCI_Clock_66MHz, 0x00ffffff }
< };
< const struct rtl_cfg2_info *p = cfg2_info;
< unsigned int i;
< u32 clk;
---
> u32 val;
4583,4589c4562,4572
< clk = RTL_R8(tp, Config2) & PCI_Clock_66MHz;
< for (i = 0; i < ARRAY_SIZE(cfg2_info); i++, p++) {
< if ((p->mac_version == mac_version) && (p->clk == clk)) {
< RTL_W32(tp, 0x7c, p->val);
< break;
< }
< }
---
> if (tp->mac_version == RTL_GIGA_MAC_VER_05)
> val = 0x000fff00;
> else if (tp->mac_version == RTL_GIGA_MAC_VER_06)
> val = 0x00ffff00;
> else
> return;
>
> if (RTL_R8(tp, Config2) & PCI_Clock_66MHz)
> val |= 0xff;
>
> RTL_W32(tp, 0x7c, val);
5875a5859
> netdev_reset_queue(tp->dev);
6177a6162,6163
> netdev_sent_queue(dev, skb->len);
>
6276c6262
< unsigned int dirty_tx, tx_left;
---
> unsigned int dirty_tx, tx_left, bytes_compl = 0, pkts_compl = 0;
6300,6303c6286,6287
< u64_stats_update_begin(&tp->tx_stats.syncp);
< tp->tx_stats.packets++;
< tp->tx_stats.bytes += tx_skb->skb->len;
< u64_stats_update_end(&tp->tx_stats.syncp);
---
> pkts_compl++;
> bytes_compl += tx_skb->skb->len;
6311a6296,6302
> netdev_completed_queue(dev, pkts_compl, bytes_compl);
>
> u64_stats_update_begin(&tp->tx_stats.syncp);
> tp->tx_stats.packets += pkts_compl;
> tp->tx_stats.bytes += bytes_compl;
> u64_stats_update_end(&tp->tx_stats.syncp);
>
6476,6488c6467,6470
< rtl_irq_disable(tp);
< napi_schedule_irqoff(&tp->napi);
<
< return IRQ_HANDLED;
< }
<
< /*
< * Workqueue context.
< */
< static void rtl_slow_event_work(struct rtl8169_private *tp)
< {
< struct net_device *dev = tp->dev;
< u16 status;
---
> if (unlikely(status & SYSErr)) {
> rtl8169_pcierr_interrupt(tp->dev);
> goto out;
> }
6490,6491c6472,6473
< status = rtl_get_events(tp) & tp->event_slow;
< rtl_ack_events(tp, status);
---
> if (status & LinkChg && tp->dev->phydev)
> phy_mac_interrupt(tp->dev->phydev);
6493,6502c6475,6479
< if (unlikely(status & RxFIFOOver)) {
< switch (tp->mac_version) {
< /* Work around for rx fifo overflow */
< case RTL_GIGA_MAC_VER_11:
< netif_stop_queue(dev);
< /* XXX - Hack alert. See rtl_task(). */
< set_bit(RTL_FLAG_TASK_RESET_PENDING, tp->wk.flags);
< default:
< break;
< }
---
> if (unlikely(status & RxFIFOOver &&
> tp->mac_version == RTL_GIGA_MAC_VER_11)) {
> netif_stop_queue(tp->dev);
> /* XXX - Hack alert. See rtl_task(). */
> set_bit(RTL_FLAG_TASK_RESET_PENDING, tp->wk.flags);
6505,6509c6482,6487
< if (unlikely(status & SYSErr))
< rtl8169_pcierr_interrupt(dev);
<
< if (status & LinkChg)
< phy_mac_interrupt(dev->phydev);
---
> if (status & RTL_EVENT_NAPI) {
> rtl_irq_disable(tp);
> napi_schedule_irqoff(&tp->napi);
> }
> out:
> rtl_ack_events(tp, status);
6511c6489
< rtl_irq_enable_all(tp);
---
> return IRQ_HANDLED;
6520,6521d6497
< /* XXX - keep rtl_slow_event_work() as first element. */
< { RTL_FLAG_TASK_SLOW_PENDING, rtl_slow_event_work },
6551d6526
< u16 enable_mask = RTL_EVENT_NAPI | tp->event_slow;
6553,6556d6527
< u16 status;
<
< status = rtl_get_events(tp);
< rtl_ack_events(tp, status & ~tp->event_slow);
6562,6567d6532
< if (status & tp->event_slow) {
< enable_mask &= ~tp->event_slow;
<
< rtl_schedule_task(tp, RTL_FLAG_TASK_SLOW_PENDING);
< }
<
6571c6536
< rtl_irq_enable(tp, enable_mask);
---
> rtl_irq_enable_all(tp);
6847d6811
< netif_stop_queue(dev);
7361,7365c7325,7327
< if ((sizeof(dma_addr_t) > 4) &&
< (use_dac == 1 || (use_dac == -1 && pci_is_pcie(pdev) &&
< tp->mac_version >= RTL_GIGA_MAC_VER_18)) &&
< !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
< !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
---
> if (sizeof(dma_addr_t) > 4 && (use_dac == 1 || (use_dac == -1 &&
> tp->mac_version >= RTL_GIGA_MAC_VER_18)) &&
> !dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
7381c7343
< rtl_irq_disable(tp);
---
> rtl8169_irq_mask_and_ack(tp);
7387,7388d7348
< rtl_ack_events(tp, 0xffff);
<
7428d7387
< dev->watchdog_timeo = RTL8169_TX_TIMEOUT;
')
Have to see if can trace down the patches involved. All I can think of is slowly taking the patches off - so you can identify what caused the problem.
I do note that the module takes the debug that can be set to 16 if you want many messages.
by arti74 » Tue Jan 29, 2019 8:18 pm 
